viernes, 12 de junio de 2026

RibbonFET and PowerVia: The Twin Innovations Powering the Angstrom Era of Computing

RibbonFET and PowerVia: The Twin Innovations Powering the Angstrom Era of Computing

Introduction: Why RibbonFET and PowerVia Matter Now

The semiconductor industry is approaching one of the most consequential technological transitions since the invention of the FinFET transistor in 2011. For decades, the recipe for faster computing was straightforward: shrink transistors, pack more of them onto a chip, and reap the benefits of higher performance and lower cost. That strategy, commonly associated with Gordon Moore's famous observation known as Moore's Law, is becoming increasingly difficult as transistor dimensions approach atomic scales.

At the same time, the rise of generative AI, large language models, advanced robotics, autonomous systems, and high-performance computing (HPC) is driving unprecedented demand for computational power. Modern AI accelerators consume hundreds of watts while processing trillions of operations per second. The challenge is no longer simply building smaller transistors; it is delivering enough power to them efficiently while controlling heat, leakage, and signal integrity.

Intel's answer is embodied in its Intel 18A process technology, which introduces two groundbreaking innovations simultaneously:

  1. RibbonFET, Intel's implementation of Gate-All-Around (GAA) transistor technology.
  2. PowerVia, the industry's first large-scale commercial backside power delivery network.

Together, these technologies represent a fundamental redesign of both the transistor itself and the way electricity flows through a chip. Intel describes the combination as the most significant advancement in transistor technology since FinFET.


The Problem: Why FinFET Is Reaching Its Limits

For more than a decade, FinFET transistors have powered nearly every advanced processor from Intel, TSMC, Samsung, AMD, Apple, and NVIDIA.

A FinFET transistor resembles a tiny vertical fin protruding from the silicon surface. The gate surrounds three sides of the fin, providing much better control than previous planar transistor designs.

However, as transistors shrink toward the 2 nm generation and beyond, several challenges emerge:

  • Increased current leakage.
  • Higher power density.
  • Greater manufacturing complexity.
  • Reduced electrostatic control.
  • Difficulty maintaining performance at lower voltages.

Engineers began realizing that simply making FinFETs smaller would eventually become impractical. A new transistor architecture was needed.


RibbonFET: Reinventing the Transistor

RibbonFET is Intel's implementation of the Gate-All-Around (GAA) transistor.

Rather than using a single vertical fin, RibbonFET employs multiple horizontal silicon ribbons stacked vertically.

Conceptually:

Traditional FinFET

 


 

 

 RibbonFET


 

 

 

 

The gate completely surrounds each ribbon.

This "gate-all-around" structure provides dramatically improved electrostatic control over electron flow. Instead of controlling current from three sides, the transistor controls it from all sides.

Why RibbonFET Is Better

1. Superior Current Control

The transistor can more effectively prevent unwanted current flow when switched off.

Benefits include:

  • Lower leakage current.
  • Reduced standby power.
  • Better battery life.
  • Improved thermal characteristics.

2. Higher Performance

When switched on, RibbonFET can deliver greater drive current.

Benefits include:

  • Faster CPUs.
  • Faster GPUs.
  • Improved AI accelerators.
  • Higher clock frequencies.

3. Better Voltage Scaling

Modern chips increasingly operate near their minimum stable voltage (Vmin).

RibbonFET improves operation at these lower voltages, enhancing performance-per-watt and enabling more efficient designs. 

4. Enhanced Design Flexibility

Intel engineers can adjust ribbon widths and threshold voltages to optimize transistors for different applications.

This flexibility is particularly valuable for:

  • Mobile processors.
  • AI accelerators.
  • HPC systems.
  • Data-center CPUs.

An Easy Analogy

Imagine a water hose.

A FinFET gate controls the hose from three sides.

A RibbonFET gate completely wraps around the hose.

The second design gives much finer control over water flow.

The same principle applies to electrons moving through a transistor channel.


PowerVia: Solving the Power Delivery Crisis

If RibbonFET redesigns the transistor, PowerVia redesigns the entire power distribution architecture of a chip.

For over fifty years, semiconductor designs routed both signals and power through metal layers located on the front side of the chip.

A simplified representation looks like this:


 

 

 

 

 

As transistor density increased, signal wires and power lines began competing for limited routing space.

This congestion created several problems:

  • Voltage droop.
  • Increased resistance.
  • Routing complexity.
  • Reduced performance.
  • Greater power losses.

Intel concluded that the power network itself needed to move.


The PowerVia Solution

PowerVia relocates power delivery to the backside of the silicon die.

The front side becomes dedicated primarily to signal routing.


 

 

 

 

 

 

 

 

 

 

Power reaches the transistors through microscopic vertical structures called nano-TSVs (Through-Silicon Vias).

Why PowerVia Is Revolutionary

1. Reduced IR Drop

IR drop refers to voltage loss caused by electrical resistance.

As power travels across long distances, voltage decreases.

PowerVia shortens power paths and dramatically reduces these losses.

2. More Room for Signals

Removing power lines from the front side frees routing resources for signal interconnects.

This results in:

  • Improved signal integrity.
  • Reduced congestion.
  • Faster communication between transistors.

3. Increased Density

Intel reports PowerVia can improve standard-cell utilization by approximately 5% to 10%. 

4. Improved Energy Efficiency

Intel states that PowerVia can provide up to a 4% performance improvement at the same power level.

Why Combining RibbonFET and PowerVia Matters

Most semiconductor breakthroughs focus on improving the transistor.

Intel attacked two bottlenecks simultaneously:

RibbonFET improves:

  • Current control.
  • Leakage.
  • Performance-per-watt.

PowerVia improves:

  • Power delivery.
  • Voltage stability.
  • Routing efficiency.

Together, they create a synergistic improvement.

Intel reports:

  • Up to 15% better performance-per-watt.
  • Up to 30% greater chip density compared with Intel 3.

How Intel Compares with TSMC and Samsung

The entire semiconductor industry is transitioning toward Gate-All-Around transistors.

Intel

  • RibbonFET
  • PowerVia

Samsung

  • MBCFET (its version of GAA)

TSMC

  • N2 GAAFET technology

What differentiates Intel is that Intel 18A introduces both GAA transistors and backside power delivery together in a production-oriented process node.

Why AI Makes These Technologies Essential

Artificial Intelligence is reshaping chip design priorities.

Training and running large AI models requires:

  • Massive memory bandwidth.
  • Extremely dense transistor arrays.
  • High computational throughput.
  • Better energy efficiency.

Every watt saved can translate into lower operating costs across thousands of servers.

RibbonFET enables higher transistor efficiency.

PowerVia enables cleaner power delivery.

Combined, they help address one of the largest challenges facing AI infrastructure: performance growth without proportional increases in energy consumption.

Early Products Built on Intel 18A

Intel's first major products leveraging these technologies include:

  • Panther Lake mobile processors.
  • Clearwater Forest server processors.
  • Future AI and HPC accelerators.

These products represent the first real-world test of whether RibbonFET and PowerVia can help Intel regain semiconductor process leadership.

Looking Beyond 18A

Intel has already announced enhanced successors such as 18A-P, which further improve performance, power efficiency, and thermal behavior while maintaining compatibility with the original design ecosystem. Early disclosures indicate performance gains of up to 9% at equivalent power and substantial thermal improvements. 

The long-term roadmap extends toward Intel's future 14A node, where backside power delivery will evolve even further. 

Conclusion

RibbonFET and PowerVia are more than incremental process improvements. They represent a rethinking of two foundational aspects of semiconductor design:

  • How transistors are built.
  • How transistors receive power.

RibbonFET addresses the limits of transistor scaling by surrounding the channel with the gate and dramatically improving electrostatic control.

PowerVia addresses a growing power-distribution crisis by moving electrical delivery to the backside of the chip.

Together they form the technological foundation of Intel's Angstrom Era strategy and may determine whether the company can successfully compete against TSMC and Samsung in the race to build the next generation of AI, HPC, and cloud-computing hardware.

As the semiconductor industry enters the post-FinFET era, RibbonFET and PowerVia are likely to be remembered as two of the defining innovations that enabled continued progress beyond the traditional limits of Moore's Law.


Glossary

18A (18 Angstrom)
Intel's advanced semiconductor process node, approximately equivalent to the 1.8 nm class.

AI Accelerator
A specialized processor optimized for machine learning and artificial intelligence workloads.

Backside Power Delivery
A technique that routes electrical power through the backside of a chip instead of the front side.

Chip Density
The number of transistors that can be integrated into a given silicon area.

Electrostatics
The behavior and control of electrical charges inside semiconductor devices.

FinFET
A transistor architecture introduced in commercial production around 2011, using a three-dimensional fin-shaped channel.

Gate-All-Around (GAA)
A transistor structure where the gate surrounds the channel on all sides.

HPC (High-Performance Computing)
Computing systems designed for scientific simulations, AI training, engineering analysis, and other computationally intensive workloads.

IR Drop
Voltage loss caused by electrical resistance in power delivery networks.

Nano-TSV
A nanoscale Through-Silicon Via used to transport electrical power through a silicon die.

PowerVia
Intel's backside power delivery architecture introduced with Intel 18A.

RibbonFET
Intel's implementation of Gate-All-Around transistor technology.

SRAM
Static Random Access Memory, a fast memory technology used extensively inside CPUs and AI accelerators.

Threshold Voltage (Vt)
The voltage required to switch a transistor from the off state to the on state.

Vmin
The minimum operating voltage at which a circuit can function reliably.

Recent References and Further Reading

  1. Intel 18A Platform Brief
  2. Intel 18A Process Technology Overview
  3. Intel Newsroom: Intel 18A Process Technology Simply Explained
  4. Tom's Hardware: Intel Details 18A-P Process Node (2026)
  5. Tom's Hardware: Intel 18A Progress and Manufacturing Update
  6. Intel Newsroom Video: Intel 18A Process Technology Simply Explained
  7. Windows Central: Intel Panther Lake and Intel 18A Overview

Recommended Advanced Reading

  • Intel Corporation Technical Papers from the VLSI Symposium 2025
  • Research on Gate-All-Around Nanosheet Transistors
  • IEEE Transactions on Electron Devices (2024–2026 issues)
  • Studies on Backside Power Delivery Networks for Sub-2 nm Semiconductor Nodes
  • Recent publications on AI hardware scaling and advanced packaging technologies such as Foveros, EMIB, and chiplet-based architectures.
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RibbonFET and PowerVia: The Twin Innovations Powering the Angstrom Era of Computing

RibbonFET and PowerVia: The Twin Innovations Powering the Angstrom Era of Computing Introduction: Why RibbonFET and PowerVia Matter Now Th...